The present application relates to semiconductor technology, and more particularly to a semiconductor-on-insulator substrate (SOI) containing an undoped and/or p-doped silicon buffer layer located between an n+ silicon layer and an oxide layer of the SOI substrate. The present application also relates to a method of forming such a SOI substrate. The present application also provides an annealing process that can be used to minimize or eliminate electron traps in the oxide layer of any SOI substrate.
Semiconductor-on-insulator (SOI) technology refers to the use of a layered semiconductor-insulator-semiconductor substrate such as for example, silicon-oxide-silicon, in place of a conventional bulk semiconductor (i.e., Si) substrate in semiconductor manufacturing, especially microelectronics. The implementation of SOI technology is one of several manufacturing strategies employed in the semiconductor industry to allow for the continued miniaturization of microelectronic devices. Reported benefits of SOI technology relative to conventional bulk complementary metal oxide semiconductor (CMOS) processing include, for example, lower parasitic capacitance due to isolation from the bulk semiconductor substrate, which improves power consumption at matched performance, and/or resistance to latch-up due to complete isolation of n- and p-well structures, and/or higher performance at equivalent VDD, and/or reduced temperature due to no doping, and/or better yield to high density, and/or lower leakage currents due to isolation thus higher power efficiency, and/or inherent radiation hardened.
From a manufacturing perspective, SOI substrates are compatible with most conventional fabrication processes. In general, an SOI-based process may be implemented without special equipment or significant retooling of an existing factory.
Despite the above, improvements with existing SOI substrates are needed particularly concerning the minimization or elimination of electron traps in the buried oxide layer of SOI substrates. Also needed is a new and improved SOI substrate that has enhanced robustness and improved buried oxide degradation.